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Logic Gates Puzzle 101

Posted on 2023-02-02 by Lucky Resistor

The message you got does not make any sense. Can you decypher it with the following logic puzzle?

The circuit was not optimised for functionality but to create a challenging puzzle and gorgeous artwork.

If you need to know logic gate symbols’ meaning, look at this Wikipedia page. This puzzle features a gated D latch. If you want to know more about this flip-flop circuit, visit this Wikipedia page.

Hints

Hint 1

You see four input lines labelled with I0, I1, I2 and I3 and four output lines O0, O1, O2 and O3. The puzzle, therefore, takes an input and produces an output.

Hint 2

The letters CWTRTCYTACRTS on top of the input section are listed in the binary table on the right side of the puzzle.

Hint 3

The four XOR gates change the input depending on the state of the two gated D latches on the left side of the puzzle.

Hint 4

You see a ICLK input, that is raised from 0 to 1 for each letter fed into the input lines.

Hint 5

The first letter is C. In the table on the right side, you see that you have to set I0 to 0, I1 to 1, I2 to 0 and I3 to 0. When these input lines are set to the correct logic levels, the clock line is raised from 0 to 1 that latches all three flip-flops.

Hint 6

When the flip-flops latch, in this puzzle at the moment when ICLK raises from 0 to 1, they copy the logic level at the input D to the output Q. Any later changes at the input D are ignored until the next time ICLK raises from 0 to 1.

Hint 7

The outputs of the three flip-flops change with every clock and create the following pattern at its output Q (top flip-flop first):

100
110
011
101
010
001
000
100 (At this point, the pattern repeats.)
110
…

Hint 8

The generated pattern is fed into the XOR gates, changing the signals of the input and therefore changing the letter of the input in another one.

Hint 9

The puzzle starts with the letter C, which sets the inputs to 0100.

After the rising edge of the clock, from 0 to 1, the three flip-flops produce the pattern 100.

The pattern, with the additional XNOR gate, puts the following signals to the four XOR gates that are placed between the input and the output lines: 0011

The input 0100 is therefore modified with XOR 0011, which results in the output 0111.

If you look at the table, the signals 0111 stand for the letter Y. What happens at the next clock cycle?

Hint 10

At the next clock cycle, the input is set to the letter W, which sets the inputs to 1011.

After the rising edge of the clock, from 0 to 1, the three flip-flops produce the pattern 110.

The pattern, with the additional XNOR gate, puts the following signals to the four XOR gates that are placed between the input and the output lines: 0101

The input 1011 is therefore modified with XOR 0101, which results in the output 1110.

If you look at the table, the signals 1110 stand for the letter O.

Solution

This circuit uses a linear-feedback shift register (LFSR), formed with the three flip-flops and the XNOR gate, to generate a repeating pattern. The generated pattern encrypts a message using an additional XNOR and the four XOR gates.

On this very small scale, this is how symmetric encryption algorithms work in their simplest form.

In this puzzle, the input CWTRTCYTACRTS is decrypted to YOUARESOSMART.

More Challenges

  • Design a circuit with five flip-flops to encrypt/decrypt a message with five bits and the full alphabet.
  • This form of encryption is not very safe, as the pattern repeats very predictable way. Is there an easy way to make encryption less predictable?

Conclusion

It might have been a tough puzzle, yet I hope you enjoyed the challenge anyways. Let me know if you like to see more difficult puzzles like this.

Contact me or comment below if you have any questions or missed information. 😄

 

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